CSCI 3500: Studio 16
Page Tables
Page tables are used to implement paged memory systems by translating
between virtual addresses and physical addresses. These tables must be
managed by the operating system on a per-process basis, as all processes
contain some number of pages that may be loaded into available page
frames (physical memory).
In this studio, you will:
- Compute page table properties
- Translate between virtual addresses and physical addresses
Please complete the required exercises below, as well as any optional
enrichment exercises that you wish to complete.
As you work through these exercises, please record your answers in a text
file. When finished, submit your work by sending your text file and
source code to dferry_submit@slu.edu
with the phrase
Page Tables
in the subject line.
Make sure that the name of each person who worked on these exercises
is listed in the first answer, and make sure you number each of your responses
so it is easy to match your responses with each exercise.
Required Exercises
- As the answer to the first exercise, list the names of the people who
worked together on this studio.
- Suppose you're working on a system with 1GB (2^30 = 1,073,741,824 bytes) of RAM
and a page size of 4Kb (2^12 = 4,096 bytes). How many page frames are available
to the system?
- Suppose that same system uses 32-bit virtual addresses, so each process can
access up to 2^32 bytes of memory. How many pages of
memory could each process potentially use?
- The answer to the last exercise should be larger than the answer to the first
exercise. What happens if a process (or collection of processes) generate more
pages than there are available page frames in memory? Does the system crash?
- On that same system, what is the theoretical maximum number of entries for the page table
of a single process? (Hint- it's the answer to one of the first two exercises.)
- What is the maximum size of that page table, assuming that each entry is 32 bits?
- In the same system, given the number of possible pages in a process, how many bits of a 32-bit
virtual address are required to specify the page number?
- In the same system, which bits of a 32 bit virtual address are used to specify the
page number? Which bits are the offset?
- In the same system, how many bits will a physical address contain after
translation? (Hint- consider the size of the physical memory)
- Considering how many page frames are in this system, how many bits of
a physical address are needed to indicate the page frame?
- Which bits of the physicial address indicate the page frame? Which bits
indicate the offset?
For the remaining questions, consider the following page table which
does not reflect the previous exercises. Suppose a page size of 1024 bytes:
Page
(in binary) |
Page Frame
(in binary) |
Valid |
Modified |
Permissions |
| 0000 |
10011 |
1 |
1 |
r |
| 0001 |
10100 |
1 |
1 |
rw |
| 0010 |
00101 |
1 |
0 |
rx |
| 0011 |
10111 |
1 |
1 |
rw |
| 0100 |
00000 |
0 |
0 |
rw |
| 0101 |
00110 |
1 |
0 |
rx |
- Which page(s) do you think contain read-only program data?
- Which page(s) do you think contain executable program code?
- There are 2^10 bytes in each page. How many bits are in each virtual
and physical address?
- What physical address does the virtual address
00110001111000 translate to?
- What virtual address does the physical address
001101110000111 correspond to?
Optional Enrichment Exercises
- No optional exercises